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Is Anyone Really Using Multicore?

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I was asked this question by a colleague and couldn't really come up with a straight answer. Are people using multicore? What is multicore? What defines if you are using it or not?

From my perspective there is more than one answer to the questions. One answer is that a multicore chip is just a bunch of cores, unrelated to each other. Another case of multicore is a symmetrical cache coherent chip where the cores are very much aware of each other. What and how you use it all depends on your use-case and what you are trying to achieve. There is no simple one stop with one solution that fits all.

There are some projects where all we want to do is take two or more processors and combine them on one multicore chip. This is the typical bill of materials reduction project, the product already exists and all the effort is just spent on making a cheaper version with the same capabilities. The typical device here would be a dual core PowerPC replacing two older processors. In this scenario the software is typically running asymmetrically (AMP) oblivious to the other cores.

In the data processing applications there is a strong trend towards multicore. Let's look at two fields. In signal and speech processing applications, DSPs are still the reigning champions but they are seeing more and more competition from general purpose processors. A few years ago we started seeing the first combinations of ARM cores and DSPs, now we see the combination of multicore ARMs and multicore DSPs on the same chip and on some chips the ARMs are taking over completely with the help of accelerators. In IP packet processing applications the general purpose processor is still king, but here we can also see a strong growth of cores. Both of these applications have a high degree of parallelism and are very well suited for multicore devices and therefore these domains are completely owned by multicore chips today. There is however a big difference in their execution environments. The DSPs typically use a homogeneous OS/RTOS environment; sometimes they even do that when the architectures are different. But the IP packet processing applications almost exclusively use a homogeneous hardware environment with a heterogeneous software environment with Linux on one or more control cores and something else on the application cores.

On the pure control plane processor the situation is somewhat different. It is similar to the first case where we are trying to reduce the number of processors in the system, but here we often also want to increase the processing capability and use the fact that the cores come closer together and can execute programs in parallel. The trend here is clear; most new processors are multicore processors but with fewer cores than those aimed at pure packet processing. The up-side is that they are more powerful. The reigning software model is definitely symmetrical multi processing (SMP) with one OS running on all the cores at the same time. 

I see multicore taking over on almost every corner of the industry and I think the question should really be "who isn't using multicore?"

Magnus Gille is Director of Product Enablement at Enea

 

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Leading Multicore Processing Models: Advantages and Disadvantages

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There are fundamentally three multiprocessing models that are used to describe system designs on multicore devices; the SMP, AMP and the bare metal model. These models have a number of benefits and drawbacks, which will be briefly described below

The SMP Model
The Symmetric Multi Processing model is the model used in the design of several enterprise OSs such as Linux as well as in the design of its application domain. In such OSs and their applications data is to a large extent shared, and a number of different locking mechanisms and atomic operations are used frequently for synchronization. 

 

The SMP model is easy to manage from a SW management perspective since it creates a good abstraction where the OS facilitates best-effort cpu load balancing, and it has been used in the server and desktop application domain for a very long time. Enterprise OSs like Linux and Windows provides a best-effort execution platform for these kinds of CPU-intensive applications.The high degree of hardware resource abstraction is in many cases an advantage, but the layer introduces substantial overhead when the application becomes as I/O intensive as they tend to be in embedded packet forwarding/routing applications. The principles of the shared memory programming model on the application level and inside the Linux kernel is based on using mutable shared objects in memory, and this is an inherent bottleneck to scalability in Multicore systems. This will inevitably lead to poor scaling to many cores.This, together with the fact that the complex SMP implementation of kernels in many cases has the drawback of not being deterministic, makes the classic SMP OSs less suitable as a RTOS for high-speed packet processing in the long run.

The AMP Model
The Asymmetric Multi Processing model uses an approach where each core is running its own complete, isolated, operating system or application frame-work (an alternative term for a more light-weight RTOS). This leaves the door open to also choose to have different RTOSs on different cores. The advantage of an AMP system is that high-performance is achieved locally and that it scales well to several cores. Using theAMP model and virtualization technique is also a way to being able to reuse legacy single core designs.The drawback with the AMP model is that the OS provides no support to the distributed application for load balancing or OS resource management.  The configuration, load and startup of such an application is also inherently complex to design.

”Bare Metal” Model
The ”bare metal” model is a single threaded execution model where the available APIs are processor-vendor specific. Since no regular RTOS exist for these threads, a common approach is to run a regular operating system on one or several cores, like Linux, and let the rest of the cores execute a “bare metal” thread and use an application framework that creates an abstraction of the hardware layer. The advantage here is of course that maximal performance and minimal overhead is achieved when running without an RTOS, but the disadvantage is though that the software becomes hardware-specific, which will force a redesign of any applications whenever the hardware is upgraded. Also, the parts of the system running without an RTOS or application framework will take on the role of a black box, i.e. there will be no observability except for the external interfaces.  Any support for tracing, debug or post mortem dump support is not available, and therefore the amount of code “out there” must therefore naturally be kept to a minimum. Over the time though, the need for more functionality in these parts will most likely grow which in turn increases the need for better device abstraction.

Conclusion

Given the advantages and disadvantages of these models - it there a way to approach multicore design that blends the advantages of these methods? 

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Enea OSE Multicore Edition takes Best of Show at ESC

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Enea OSE Multicore Edition has been selected as Best of Show at TechInsight's Embedded Systems Conference - BostonOSE Multicore Edition features a groundbreaking kernel design that blends the advantages of both traditional Asymmetric Multiprocessing (AMP) and Symmetric Multiprocessing (SMP). VDC Research Group served as the jury and awarded the prize, which was based on an exhaustive set of criteria including innovation, business significance, availability and other factors.

 

"Software is the key to releasing the power and value of multicore processors," said Steve Balacco, Director at VDC Research Group. "The unique approach taken by Enea with OSE Multicore Edition delivers the performance of linear scalability with a simple programming model and architecture. Products like this address the challenge to development organizations of being able to make full use of multicore processors within device development."

 

Enea Whitepaper

 

 

For more information about this award winning technology download this white paper.

 

 

 

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